Programmable integrated circuits are a type of integrated circuit that can be configured by a user to implement custom logic functions. In a typical scenario, a logic designer uses computer-aided design (CAD) tools to design a custom logic circuit. When the design process is complete, the CAD tools generate configuration data. The configuration data is loaded into a programmable integrated circuit to configure the device to perform desired logic functions.
In a typical system, a programmable integrated circuit, memory devices, and other electronic components are mounted on a printed circuit board. The programmable integrated circuit includes memory interface circuitry that is used to relay data back and forth between the programmable integrated circuit and the memory devices (i.e., the memory interface circuitry is used to read data from and write data into the memory devices). When performing such memory read and write operations, the timing of control and data signals is critical.
Because programmable integrated circuits can be configured in many different ways and are installed on many different types of boards, the lengths of circuit board traces coupling the programmable integrated circuit to the memory devices can vary from one system to another. As a result, it is generally not possible to know in advance exactly how data and clock paths between a programmable integrated circuit and a given memory device will perform. In some systems, the data and clock paths may have one set of timing characteristics, whereas in other systems the data and clock paths may have a different set of timing characteristics.
During memory read operations, data signals and an associated data strobe signal are synchronously output from a given memory device (i.e., the data signals transition at the clock edges of the data strobe signal). In receiving the data signals and the data strobe signal from the given memory device, the memory interface circuitry uses a dedicated 90° phase shift circuit to shift the data strobe signal so that the rising and falling clock edges of the data strobe signal fall near the center of each data signal. Having one 90° phase shift circuit that is used for shifting the data strobe signal for each corresponding memory device, however, results in significant area overhead and increases cost.